sn54ahct132, sn74ahct132 quadruple positive-nand gates with schmitt-trigger inputs scls366f may 1997 revised january 2000 1 post office box 655303 ? dallas, texas 75265 epic ? (enhanced-performance implanted cmos) process inputs are ttl-voltage compatible operation from very slow input transitions temperature-compensated threshold levels high noise immunity same pinouts as 'ahct00 latch-up performance exceeds 250 ma per jesd 17 esd protection exceeds jesd 22 2000-v human-body model (a114-a) 200-v machine model (a115-a) 1000-v charged-device model (c101) package options include plastic small-outline (d), shrink small-outline (db), thin very small-outline (dgv), thin shrink small-outline (pw), and ceramic flat (w) packages, ceramic chip carriers (fk), and standard plastic (n) and ceramic (j) dips description the 'ahct132 devices are quadruple positive-nand gates. these devices perform the boolean function y = a ? b or y = a + b in positive logic. each circuit functions as a nand gate, but because of the schmitt action, it has different input threshold levels for positive- and negative-going signals. these circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean jitter-free output signals. the sn54ahct132 is characterized for operation over the full military temperature range of 55 c to 125 c. the sn74ahct132 is characterized for operation from 40 c to 85 c. function table (each gate) inputs output a b y h h l l xh x l h copyright ? 2000, texas instruments incorporated unless otherwise noted this document contains production data information current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. epic is a trademark of texas instruments incorporated. sn54ahct132 ...j or w p ackage sn74ahct132 . . . d, db, dgv, n, or pw package (top view) 3212019 910111213 4 5 6 7 8 18 17 16 15 14 1b 1a nc 3y 3a v 4b 2y gnd nc sn54ahct132 . . . fk package (top view) cc nc no internal connection 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1a 1b 1y 2a 2b 2y gnd v cc 4b 4a 4y 3b 3a 3y 4a nc 4y nc 3b 1y nc 2a nc 2b
sn54ahct132, sn74ahct132 quadruple positive-nand gates with schmitt-trigger inputs scls366f may 1997 revised january 2000 2 post office box 655303 ? dallas, texas 75265 logic symbol 2 1 1a 2 1b 1y 3 4 2a 5 2b 2y 6 9 3a 10 3b 3y 8 12 4a 13 4b 4y 11 2 this symbol is in accordance with ansi/ieee std 91-1984 and iec publication 617-12. pin numbers shown are for the d, db, dgv, j, n, pw, and w packages. & logic diagram, each gate (positive logic) a b y absolute maximum ratings over operating free-air temperature range (unless otherwise noted) 3 supply voltage range, v cc 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input voltage range, v i (see note 1) 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output voltage range, v o (see note 1) 0.5 v to v cc + 0.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input clamp current, i ik (v i < 0) 20 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output clamp current, i ok (v o < 0 or v o > v cc ) 20 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous output current, i o (v o = 0 to v cc ) 25 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous current through v cc or gnd 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . package thermal impedance, q ja (see note 2): d package 86 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . db package 96 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dgv package 127 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . n package 80 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . pw package 113 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg 65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 stresses beyond those listed under aabsolute maximum ratingso may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditi onso is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. notes: 1. the input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. the package thermal impedance is calculated in accordance with jesd 51.
sn54ahct132, sn74ahct132 quadruple positive-nand gates with schmitt-trigger inputs scls366f may 1997 revised january 2000 3 post office box 655303 ? dallas, texas 75265 recommended operating conditions (see note 3) sn54ahct132 sn74ahct132 unit min max min max unit v cc supply voltage 4.5 5.5 4.5 5.5 v v i input voltage 0 5.5 0 5.5 v v o output voltage 0 v cc 0 v cc v i oh high-level output current 8 8 ma i ol low-level output current 8 8 ma t a operating free-air temperature 55 125 40 85 c note 3: all unused inputs of the device must be held at v cc or gnd to ensure proper device operation. refer to the ti application report, implications of slow or floating cmos inputs , literature number scba004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions v cc t a = 25 c sn54ahct132 sn74ahct132 unit parameter test conditions v cc min typ max min max min max unit v t+ positive going in p ut 4.5 v 0.9 1.9 0.9 1.9 0.9 1.9 v p os iti ve-go i ng i npu t threshold voltage 5.5 v 1 2.1 1 2.1 1 2.1 v v t negative going in p ut 4.5 v 0.5 1.5 0.5 1.5 0.5 1.5 v n ega ti ve-go i ng i npu t threshold voltage 5.5 v 0.6 1.7 0.6 1.7 0.6 1.7 v d v t hysteresis 4.5 v 0.3 1.4 0.3 1.4 0.3 1.4 v h ys t eres i s (v t+ v t ) 5.5 v 0.3 1.5 0.3 1.5 0.3 1.5 v v oh i oh = 50 a 45v 4.4 4.5 4.4 4.4 v v oh i oh = 8 ma 4 . 5 v 3.94 3.8 3.8 v v ol i ol = 50 a 45v 0.1 0.1 0.1 v v ol i ol = 8 ma 4 . 5 v 0.36 0.5 0.44 v i i v i = v cc or gnd 0 v to 5.5 v 0.1 1* 1 a i cc v i = v cc or gnd, i o = 0 5.5 v 2 20 20 a d i cc 2 one input at 3.4 v, other inputs at v cc or gnd 5.5 v 1.35 1.5 1.5 ma c i v i = v cc or gnd 5 v 2 10 10 pf * on products compliant to mil-prf-38535, this parameter is not production tested at v cc = 0 v. 2 this is the increase in supply current for each input at one of the specified ttl voltage levels rather than 0 v or v cc . product preview information concerns products in the formative or design phase of development. characteristic data and other specifications are design goals. texas instruments reserves the right to change or discontinue these products without notice.
sn54ahct132, sn74ahct132 quadruple positive-nand gates with schmitt-trigger inputs scls366f may 1997 revised january 2000 4 post office box 655303 ? dallas, texas 75265 switching characteristics over recommended operating free-air temperature range, v cc = 5 v 0.5 v (unless otherwise noted) (see figure 1) parameter from to load t a = 25 c sn54ahct132 sn74ahct132 unit parameter (input) (output) capacitance min typ max min max min max unit t plh aorb y c l =15 p f 5.5* 8* 1* 9* 1 9 ns t phl a or b y c l = 15 pf 4.5* 6* 1* 7* 1 7 ns t plh aorb y c l =50 p f 6.5 9 1 10 1 10 ns t phl a or b y c l = 50 pf 5.5 7 1 8 1 8 ns * on products compliant to mil-prf-38535, this parameter is not production tested. noise characteristics, v cc = 5 v, c l = 50 pf, t a = 25 c (see note 4) parameter sn74ahct132 unit parameter min typ max unit v ol(p) quiet output, maximum dynamic v ol 0.5 0.8 v v ol(v) quiet output, minimum dynamic v ol 0.28 0.8 v v oh(v) quiet output, minimum dynamic v oh 5 v v ih(d) high-level dynamic input voltage 2 v v il(d) low-level dynamic input voltage 0.8 v note 4: characteristics are for surface-mount packages only. operating characteristics, v cc = 5 v, t a = 25 c parameter test conditions typ unit c pd power dissipation capacitance no load, f = 1 mhz 15 pf product preview information concerns products in the formative or design phase of development. characteristic data and other specifications are design goals. texas instruments reserves the right to change or discontinue these products without notice.
sn54ahct132, sn74ahct132 quadruple positive-nand gates with schmitt-trigger inputs scls366f may 1997 revised january 2000 5 post office box 655303 ? dallas, texas 75265 parameter measurement information 50% v cc 3 v 3 v 0 v 0 v t h t su voltage waveforms setup and hold times data input t plh t phl t phl t plh v oh v oh v ol v ol 3 v 0 v 50% v cc 50% v cc input out-of-phase output in-phase output timing input 50% v cc voltage waveforms propagation delay times inverting and noninverting outputs output control output waveform 1 s1 at v cc (see note b) output waveform 2 s1 at gnd (see note b) v ol v oh t pzl t pzh t plz t phz v cc 0 v 50% v cc v ol + 0.3 v 50% v cc 0 v 3 v voltage waveforms enable and disable times low- and high-level enabling t plh /t phl t plz /t pzl t phz /t pzh open drain open v cc gnd v cc test s1 3 v 0 v t w voltage waveforms pulse duration input notes: a. c l includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. c. all input pulses are supplied by generators having the following characteristics: prr 1 mhz, z o = 50 w , t r 3 ns, t f 3 ns. d. the outputs are measured one at a time with one input transition per measurement. from output under test c l (see note a) load circuit for 3-state and open-drain outputs s1 v cc r l = 1 k w gnd from output under test c l (see note a) test point load circuit for totem-pole outputs open v oh 0.3 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v figure 1. load circuit and voltage waveforms
important notice texas instruments and its subsidiaries (ti) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. ti warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with ti's standard warranty. testing and other quality control techniques are utilized to the extent ti deems necessary to support this warranty. specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage (acritical applicationso). ti semiconductor products are not designed, authorized, or warranted to be suitable for use in life-support devices or systems or other critical applications. inclusion of ti products in such applications is understood to be fully at the customer's risk. in order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. ti assumes no liability for applications assistance or customer product design. ti does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of ti covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. ti's publication of information regarding any third party's products or services does not constitute ti's approval, warranty or endorsement thereof. copyright ? 2000, texas instruments incorporated
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